ResearchBenchmarksMultiplier Logic Synthesis on 32-bit multiplier (test)Multiplier Logic Synthesis on 32-bit multiplier (test)Follow5,203.2Area (µm²)Default5,109.1085,744.2296,379.357,014.471May 10, 2024Evaluation resultsMethodMethodLinksArea (µm²)Delay (ns)Default2024.055,203.24.88RL-MUL2024.055,757.35.86MCTS2024.057,331.56.07PPO+MCTS2024.057,555.52.34