Homomorphic Encryption Kernel Latency on HE Kernels N=2^16
3.5HE Add Latency (μs)CROSS
Evaluation results
| Method | Links | ||||
|---|---|---|---|---|---|
| CROSSHardware=TPUv6e-8, L=48, log2 q=28, Dnum=32025.01 | 3.5 | 487 | 74 | 393 | |
| CROSSHardware=TPUv6e-8, Config=Default Set D, L=51, log2 q=28, Dnum=32025.01 | 3.5 | 509 | 77 | 414 | |
| CROSSHardware=TPUv6e-8, L=47, log2 q=28, Dnum=32025.01 | 3.6 | 488 | 67 | 328 | |
| CROSSHardware=TPUv6e-8, L=60, log2 q=28, Dnum=32025.01 | 4 | 697 | 95 | 496 | |
| CROSSHardware=TPUv6e-8, L=36, log2 q=28, Dnum=32025.01 | 5 | 358 | 61 | 307 | |
| CROSSHardware=TPUv5p-8, L=48, log2 q=28, Dnum=32025.01 | 5.6 | 851 | 143 | 769 | |
| CROSSHardware=TPUv5p-8, L=47, log2 q=28, Dnum=32025.01 | 5.7 | 1,072 | 137 | 818 | |
| CROSSHardware=TPUv5p-8, L=64, log2 q=28, Dnum=42025.01 | 5.9 | 1,190 | 173 | 1,098 | |
| CROSSHardware=TPUv6e-8, L=64, log2 q=28, Dnum=42025.01 | 6.3 | 709 | 97 | 547 | |
| CROSSHardware=TPUv5p-8, L=60, log2 q=28, Dnum=32025.01 | 6.5 | 1,101 | 158 | 993 | |
| CROSSHardware=TPUv6e-4, L=48, log2 q=28, Dnum=32025.01 | 6.5 | 951 | 145 | 787 | |
| CROSSHardware=TPUv6e-4, L=47, log2 q=28, Dnum=32025.01 | 6.6 | 955 | 135 | 754 | |
| CROSSHardware=TPUv6e-4, Config=Default Set D, L=51, log2 q=28, Dnum=32025.01 | 6.8 | 1,007 | 149 | 798 | |
| BASALISCHardware=ASIC, L=32, log2 q=40, Dnum=32025.01 | 8 | 312 | — | 313 | |
| CROSSHardware=TPUv6e-4, L=60, log2 q=28, Dnum=32025.01 | 8.2 | 1,364 | 187 | 941 | |
| CROSSHardware=TPUv6e-4, L=64, log2 q=28, Dnum=42025.01 | 8.8 | 1,414 | 194 | 1,080 | |
| CraterLakeHardware=ASIC, L=51, log2 q=28, Dnum=32025.01 | 9 | 35 | 9 | 27 | |
| CROSSHardware=TPUv6e-4, L=36, log2 q=28, Dnum=32025.01 | 10.9 | 714 | 106 | 593 | |
| CROSSHardware=TPUv5p-8, L=36, log2 q=28, Dnum=32025.01 | 11 | 656 | 117 | 687 | |
| CROSSHardware=TPUv5p-8, Config=Default Set D, L=51, log2 q=28, Dnum=32025.01 | 11 | 782 | 131 | 853 | |
| CROSSHardware=TPUv4-8, L=60, log2 q=28, Dnum=32025.01 | 13.1 | 7,336 | 1,195 | 4,491 | |
| CROSSHardware=TPUv5e-4, L=48, log2 q=28, Dnum=32025.01 | 13.6 | 1,480 | 236 | 1,161 | |
| CROSSHardware=TPUv5e-4, L=36, log2 q=28, Dnum=32025.01 | 14 | 1,114 | 175 | 908 | |
| CROSSHardware=TPUv5e-4, L=47, log2 q=28, Dnum=32025.01 | 14.5 | 1,559 | 228 | 1,091 | |
| CROSSHardware=TPUv4-8, L=47, log2 q=28, Dnum=32025.01 | 14.9 | 5,825 | 919 | 3,659 | |
| CROSSHardware=TPUv5e-4, Config=Default Set D, L=51, log2 q=28, Dnum=32025.01 | 15 | 1,574 | 242 | 1,149 | |
| CROSSHardware=TPUv4-8, L=48, log2 q=28, Dnum=32025.01 | 15.5 | 5,652 | 969 | 3,799 | |
| CROSSHardware=TPUv4-8, Config=Default Set D, L=51, log2 q=28, Dnum=32025.01 | 15.8 | 5,962 | 988 | 3,975 | |
| CROSSHardware=TPUv5e-4, L=60, log2 q=28, Dnum=32025.01 | 17.6 | 2,201 | 309 | 1,418 | |
| CROSSHardware=TPUv4-8, L=64, log2 q=28, Dnum=42025.01 | 18.6 | 7,992 | 1,260 | 5,253 | |
| CROSSHardware=TPUv5e-4, L=64, log2 q=28, Dnum=42025.01 | 19 | 2,238 | 344 | 1,723 | |
| FABHardware=U280, L=32, log2 q=52, Dnum=42025.01 | 40 | 1,710 | 190 | 1,570 | |
| CROSSHardware=TPUv4-8, L=36, log2 q=28, Dnum=32025.01 | 42.8 | 4,373 | 724 | 2,875 | |
| CheddarHardware=RTX4090, L=48, log2 q=≤ 31, Dnum=122025.01 | 48 | 533 | 68 | 476 | |
| FIDESlibHardware=RTX4090, L=30, log2 q=59, Dnum=32025.01 | 51 | 1,084 | 156 | 1,107 | |
| WarpDriveHardware=A100, L=34, log2 q=28, Dnum=Not Known2025.01 | 61 | 4,284 | 241 | 5,659 | |
| CROSSHardware=AMD 9950X3D, L=51, log2 q=28, Dnum=32025.01 | 79 | 132,472 | 27,281 | 72,741 | |
| OpenFHEHardware=AMD 9950X3D, L=51, log2 q=28, Dnum=32025.01 | 15,390 | 417,651 | 22,670 | 397,798 |