# Trilinear Compute-in-Memory Architecture for Energy-Efficient Transformer Acceleration Source: [Trilinear Compute-in-Memory Architecture for Energy-Efficient Transformer Acceleration]() Collection index: [llms.txt]() Data updated: 2026-04-11T05:00:04.810Z Authors: Md Zesun Ahmed Mia, Jiahui Duan, Kai Ni, Abhronil Sengupta Published: 2026-04-08T22:07:05.000Z ## Abstract Self-attention in Transformers generates dynamic operands that force conventional Compute-in-Memory (CIM) accelerators into costly non-volatile memory (NVM) reprogramming cycles, degrading throughput and stressing device endurance. Existing solutions either reduce but retain NVM writes through matrix decomposition or sparsity, or move attention computation to digital CMOS at the expense of NVM density. We present TrilinearCIM, a Double-Gate FeFET (DG-FeFET)-based architecture that uses back-gate modulation to realize a three-operand multiply-accumulate primitive for in-memory attention computation without dynamic ferroelectric reprogramming. Evaluated on BERT-base (GLUE) and ViT-base (ImageNet and CIFAR), TrilinearCIM outperforms conventional CIM on seven of nine GLUE tasks while achieving up to 46.6\\% energy reduction and 20.4\\% latency improvement over conventional FeFET CIM at 37.3\\% area overhead. To our knowledge, this is the first architecture to perform complete Transformer attention computation exclusively in NVM cores without runtime reprogramming. ## Recorded benchmark results A research result applies to its stated dataset, split, metric and evaluation configuration. Compare like-for-like settings, preserve the metric's unit and direction, and distinguish paper-reported results from independent reproduction. The best result recorded here is not a claim of exhaustive, current global coverage. ## Original sources and implementation [Original paper]() [PDF]()