Automated Generation of Microfluidic Netlists using Large Language Models

About

Microfluidic devices have emerged as powerful tools in various laboratory applications, but the complexity of their design limits accessibility for many practitioners. While progress has been made in microfluidic design automation (MFDA), a practical and intuitive solution is still needed to connect microfluidic practitioners with MFDA techniques. This work introduces the first practical application of large language models (LLMs) in this context, providing a preliminary demonstration. Building on prior research in hardware description language (HDL) code generation with LLMs, we propose an initial methodology to convert natural language microfluidic device specifications into system-level structural Verilog netlists. We demonstrate the feasibility of our approach by generating structural netlists for practical benchmarks representative of typical microfluidic designs with correct functional flow and an average syntactical accuracy of 88%.

Jasper Davidson, Skylar Stockham, Allen Boston, Ashton Snelgrove, Valerio Tenace, Pierre-Emmanuel Gaillardon · 2026

Related benchmarks

Task	Dataset	Result
Microfluidic Functionality Verification	MFD Benchmark 6	Pass@1 Acc—	5
Microfluidic Functionality Verification	MFD Benchmark 7	Pass@1 Accuracy—	5
Microfluidic Functionality Verification	MFD Benchmark 8	Pass@1—	5
Microfluidic Functionality Verification	MFD Benchmark 9	Pass@1 Accuracy—	5
Microfluidic Functionality Verification	MFD Benchmark 10	Pass@1 Accuracy—	5
Verilog Syntax Generation	MFD Benchmark 6	Pass@1—	5
Verilog Syntax Generation	MFD Benchmark 7	Pass@1—	5
Verilog Syntax Generation	MFD Benchmark 8	Pass@1—	5
Verilog Syntax Generation	MFD Benchmark 9	Pass@1—	5
Verilog Syntax Generation	MFD Benchmark 10	Pass@1—	5