# LLM4Cov: Execution-Aware Agentic Learning for High-coverage Testbench Generation

Source: [LLM4Cov: Execution-Aware Agentic Learning for High-coverage Testbench Generation](<https://www.sota2.com/research/paper/6997eab209c33900fcd76730>)

Collection index: [llms.txt](<https://www.sota2.com/research/llms.txt>)

Data updated: 2026-06-02T05:00:12.522Z

Authors: Hejia Zhang, Zhongming Yu, Chia-Tung Ho, Haoxing Ren, Brucek Khailany, Jishen Zhao

Published: 2026-02-18T23:36:46.000Z

## Abstract

Execution-aware LLM agents offer a promising paradigm for learning from tool feedback, but such feedback can be expensive and slow to obtain, making online reinforcement learning (RL) less practical in certain scenarios. High-coverage hardware verification exemplifies this challenge due to its reliance on industrial simulators and non-differentiable execution signals. We propose LLM4Cov, an offline agent-learning framework that models verification as single-step state transitions guided by deterministic evaluators. Building on this formulation, we introduce execution-validated data curation, policy-aware agentic data synthesis, and worst-state-prioritized sampling to enable scalable learning under execution constraints. We further curate a reality-aligned benchmark adapted from an existing verification suite through a revised evaluation protocol. Using the proposed pipeline, a compact 4B-parameter model achieves 69.2% pass rate and 90.4% average coverage in CVDP-ECov under agentic evaluation, outperforming its teacher by 5.3% and 10.5%, demonstrating competitive performance against models an order of magnitude larger.

## Recorded benchmark results

A research result applies to its stated dataset, split, metric and evaluation configuration. Compare like-for-like settings, preserve the metric's unit and direction, and distinguish paper-reported results from independent reproduction. The best result recorded here is not a claim of exhaustive, current global coverage.

- [Hardware Verification Testbench Generation on CVDP-ECov](<https://www.sota2.com/research/sota/hardware-verification-testbench-generation-on-cvdp-ecov.md>): Hardware Verification Testbench Generation; CVDP-ECov; Coverage Pass Rate: 69.2.

## Original sources and implementation

[Original paper](<https://arxiv.org/abs/2602.16953>)

[PDF](<https://arxiv.org/pdf/2602.16953.pdf>)