# FPGA Resource-aware Structured Pruning for Real-Time Neural Networks Source: [FPGA Resource-aware Structured Pruning for Real-Time Neural Networks]() Collection index: [llms.txt]() Data updated: 2025-10-28T13:57:15.618Z Authors: Benjamin Ramhorst, Vladimir Loncar, George A. Constantinides Published: 2023-08-09T18:14:54.000Z ## Abstract Neural networks achieve state-of-the-art performance in image classification, speech recognition, scientific analysis and many more application areas. Due to the high computational complexity and memory footprint of neural networks, various compression techniques, such as pruning and quantization, have been proposed in literature. Pruning sparsifies a neural network, reducing the number of multiplications and memory. However, pruning often fails to capture properties of the underlying hardware, causing unstructured sparsity and load-balance inefficiency, thus bottlenecking resource improvements. We propose a hardware-centric formulation of pruning, by formulating it as a knapsack problem with resource-aware tensor structures. Evaluated on a range of tasks, including sub-microsecond particle classification at CERN's Large Hadron Collider and fast image classification, the proposed method achieves reductions ranging between 55% and 92% in the DSP utilization and up to 81% in BRAM utilization. ## Recorded benchmark results A research result applies to its stated dataset, split, metric and evaluation configuration. Compare like-for-like settings, preserve the metric's unit and direction, and distinguish paper-reported results from independent reproduction. The best result recorded here is not a claim of exhaustive, current global coverage. - [Jet Substructure Classification on HLF JSC OpenML](): Jet Substructure Classification; HLF JSC OpenML; Accuracy: 76.3. ## Original sources and implementation [Original paper]() [PDF]()