# A Real Time 1280x720 Object Detection Chip With 585MB/s Memory Traffic

Source: [A Real Time 1280x720 Object Detection Chip With 585MB/s Memory Traffic](<https://www.sota2.com/research/paper/68fa6c7e1e209131cea344db>)

Collection index: [llms.txt](<https://www.sota2.com/research/llms.txt>)

Data updated: 2025-10-26T00:11:46.889Z

Authors: Kuo-Wei Chang, Hsu-Tung Shih, Tian-Sheuan Chang, Shang-Hong Tsai, Chih-Chyau Yang, Chien-Ming Wu, Chun-Ming Huang

Published: 2022-05-02T09:58:39.000Z

## Abstract

Memory bandwidth has become the real-time bottleneck of current deep learning accelerators (DLA), particularly for high definition (HD) object detection. Under resource constraints, this paper proposes a low memory traffic DLA chip with joint hardware and software optimization. To maximize hardware utilization under memory bandwidth, we morph and fuse the object detection model into a group fusion-ready model to reduce intermediate data access. This reduces the YOLOv2's feature memory traffic from 2.9 GB/s to 0.15 GB/s. To support group fusion, our previous DLA based hardware employes a unified buffer with write-masking for simple layer-by-layer processing in a fusion group. When compared to our previous DLA with the same PE numbers, the chip implemented in a TSMC 40nm process supports 1280x720@30FPS object detection and consumes 7.9X less external DRAM access energy, from 2607 mJ to 327.6 mJ.

## Recorded benchmark results

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## Original sources and implementation

[Original paper](<https://arxiv.org/abs/2205.01571>)

[PDF](<https://arxiv.org/pdf/2205.01571.pdf>)