# Nanoscale Field-Effect Transistors: An Ultimate Size Analysis

Source: [Nanoscale Field-Effect Transistors: An Ultimate Size Analysis](<https://www.sota2.com/research/paper/68fa246a2c2a3760193a3d1c>)

Collection index: [llms.txt](<https://www.sota2.com/research/llms.txt>)

Data updated: 2025-10-24T09:09:53.973Z

Authors: F. G. Pikus, K. K. Likharev

Published: 1997-06-03T17:40:29.000Z

## Abstract

We have used a simple, analytically solvable model to analyze the characteristic s of dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with 10-nm-scale channel length L. The model assumes ballistic dynamics of 2D electrons in an undoped channel between highly doped source and drain. When applied to silicon n-MOSFETs, calculations show that the voltage gain (necessary for logic applications) drops sharply at L ~ 10 nm, while the conductance modulation remains sufficient for memory applications until L ~ 4 nm.

## Recorded benchmark results

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## Original sources and implementation

[Original paper](<https://arxiv.org/abs/cond-mat/9706026>)

[PDF](<https://arxiv.org/pdf/cond-mat/9706026.pdf>)