# Very Fast Chip-level Thermal Analysis

Source: [Very Fast Chip-level Thermal Analysis](<https://www.sota2.com/research/paper/68fa21477a2b558e29336370>)

Collection index: [llms.txt](<https://www.sota2.com/research/llms.txt>)

Data updated: 2025-10-28T13:52:13.841Z

Authors: K. Nakabayashi, T. Nakabayashi, K. Nakajima

Published: 2008-01-07T16:44:14.000Z

## Abstract

We present a new technique of VLSI chip-level thermal analysis. We extend a newly developed method of solving two dimensional Laplace equations to thermal analysis of four adjacent materials on a mother board. We implement our technique in C and compare its performance to that of a commercial CAD tool. Our experimental results show that our program runs 5.8 and 8.9 times faster while keeping smaller residuals by 5 and 1 order of magnitude, respectively.

## Recorded benchmark results

A research result applies to its stated dataset, split, metric and evaluation configuration. Compare like-for-like settings, preserve the metric's unit and direction, and distinguish paper-reported results from independent reproduction. The best result recorded here is not a claim of exhaustive, current global coverage.

## Original sources and implementation

[Original paper](<https://arxiv.org/abs/0801.1056>)

[PDF](<https://arxiv.org/pdf/0801.1056.pdf>)